Role at a glance
- Job function
-
Engineering & R&D Computer Hardware Engineering
- Salary
- $136K – $218.5K/yr
- Location
- Santa Clara, California, United States
- Work arrangement
- Hybrid
- Employment
- Full-time
- Experience
- 4+ years in silicon bring-up, ASIC validation, or system-level debug
- Education
- BS/MS in EE/CE (or equivalent experience)
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Role Summary
The NVIDIA Silicon Co-design Group HW ArchDev Methodology team is seeking an engineer to define validation strategies, automation frameworks, and telemetry systems for next-generation GPUs and AI accelerators. The role spans architecture, silicon bring-up, and production.
What You'll Do
- Design system-level validation strategies for complex architectures, corner cases, PVT, large-scale behavior, and feature interactions
- Build AI-assisted and data-driven validation workflows that improve coverage, debug turnaround, and efficiency
- Profile real workloads including training, inference, HPC, video, and emerging applications
- Deploy automation and telemetry pipelines that scale across products and teams
- Drive silicon bring-up and root-cause debug with reusable, high-leverage methods
Generated from the employer's posting. Verify important details before applying.
View full postingQualifications
A BS/MS in EE/CE or equivalent experience with 4+ years in silicon bring-up, ASIC validation, or system-level debug.
Required
- BS/MS in EE/CE (or equivalent experience)
- 4+ years in silicon bring-up, ASIC validation, or system-level debug
- Grounding in PVT, timing (STA), signal integrity, power, and high-speed IO (PCIe, chip-to-chip)
- Understanding of firmware/driver-hardware interaction
- Experience or curiosity around data-driven workflows, telemetry, and AI/LLM-assisted development
- Thrive in a collaborative environment
Preferred
- Applied AI/ML or LLMs to validation, debug automation, or workload analysis
- Built infrastructure others still use: pipelines, observability systems, debug tools
- Artifacts such as postmortems, test methods, tools, papers, or dashboards
- Driven cross-functional work across architecture, firmware, validation, and manufacturing
Original job description
Content provided by the employer
Original job description
Content provided by the employer
NVIDIA Silicon Co-design Group is seeking a versatile engineer to join the HW ArchDev Methodology team. SCG operates across the full product lifecycle—from early architecture definition through silicon bring-up to production—providing a unique end-to-end perspective on next-generation systems
You define how validation is done. Not how it's been done, how it should be done, for chips that don't exist yet. NVIDIA's HW ArchDev Methodology team sits at a rare intersection: architecture, silicon bring-up, and production, all in one group. We build the validation strategies, automation frameworks, and telemetry systems that determine whether next-generation GPUs and AI accelerators ship on time and at quality. The problems are novel. The stakes are real.
What you’ll be doing:
Design system-level validation strategies for complex architectures, corner cases, PVT, large-scale behavior, feature interactions
Build AI-assisted and data-driven validation workflows that improve coverage, debug turnaround, and efficiency
Profile real workloads: training, inference, HPC, video, and emerging applications
Deploy automation and telemetry pipelines that scale across products and teams
Drive silicon bring-up and root-cause debug with reusable, high-leverage methods
What we need to see:
BS/MS in EE/CE (or equivalent experience)
4+ years in silicon bring-up, ASIC validation, or system-level debug
Grounding in PVT, timing (STA), signal integrity, power, and high-speed IO (PCIe, chip-to-chip)
Understanding of firmware/driver-hardware interaction
Experience or curiosity around data-driven workflows, telemetry, and AI/LLM-assisted development
Thrive in a collaborative environment.
Ways to Stand Out from the crowd:
You've applied AI/ML or LLMs to validation, debug automation, or workload analysis, not just mentioned it
You've built infrastructure others still use: pipelines, observability systems, debug tools
You have artifacts: postmortems, test methods, tools, papers, or dashboards that show how you think
You've driven cross-functional work across architecture, firmware, validation, and manufacturing
If you've ever looked at a validation process and redesigned it from first principles, we want to talk!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About the company
NVIDIA
Large Enterprise
NVIDIA is a leading technology company renowned for its graphics processing units (GPUs) and innovative computing solutions that enhance visual experiences across multiple platforms, including gaming, scientific research, and artificial intelligence. Founded in 1993, the company has expanded its offerings to include powerful AI frameworks and deep learning platforms, making significant contributions to industries such as gaming, data centers, automotive, and healthcare. NVIDIA's commitment to pushing the boundaries of visual computing continues to drive advancements in both hardware and software, positioning the company at the forefront of emerging technologies and digital transformation.