Role at a glance
- Job function
-
Engineering & R&D Semiconductor & Display Engineering
- Salary
- Not Disclosed
- Location
- Austin, Texas, United States
- Work arrangement
- On-site
- Employment
- Full-time
- Experience
- Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking. Experience or coursework...
- Education
- Bachelor's
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Role Summary
This role focuses on physical design and large-chip integration for high-performance, power-efficient GPUs, implementing chip designs from RTL to tapeout. It combines strategic engineering with hands-on physical design work.
What You'll Do
- Work with the front-end team to understand chip architecture and address physical-design considerations early in the design cycle.
- Develop and optimize physical-design construction approaches for performance, power, and area.
- Work on designs using the latest technology nodes.
- Develop methodologies, best-known methods, guidelines, and checklists to streamline physical-design work, and drive execution and progress.
- Coordinate place-and-route engineering work, set goals, plan work, and manage dependencies across top-level design, STA, and block place...
- Lead efforts to resolve physical-design and flow issues, identify solutions, and drive their execution.
Generated from the employer's posting. Verify important details before applying.
View full postingQualifications
Required: a bachelor’s degree in Engineering or Computer Science; experience or coursework in at least one of physical design, synthesis, DFT, or clocking; experience or coursework with digital logic design, RTL, CMOS transistor logics, or VLSI concepts; and experience with scripting languages such as TCL, Python, Perl, or shell scripting.
Preferred
- Master’s degree preferred.
- Ability in ASIC implementation, including synthesis, DFT insertion, floorplanning, clock and power distribution, place and route, and...
- Experience with EDA tools and exposure to their APIs.
- Design knowledge and innovative physical construction and optimization flows to improve GPU performance, power, and area.
- Knowledge of multi-voltage, power-gated, and power-retention concepts.
- Practical knowledge of hierarchical and top-down design, budgeting, timing, and physical convergence.
Original job description
Content provided by the employer
Original job description
Content provided by the employer
Summary
Do you love creating sophisticated solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions! Joining this group means crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to tapeout.
Description
- Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle.
- Drive outstanding PD construction and optimization recipes for performance, power and Area (PPA).
- Work on pioneering designs in the latest technology nodes.
- Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.
- Drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block PnR.
- Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.
Minimum Qualifications
Bachelors degree in Engineering or Computer Science required.
Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking.
Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.
Experience with scripting languages such as TCL, Python, Perl or shell scripting.
Preferred Qualifications
Masters degree preferred.
We value ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place and Route and all aspects of timing, electrical and physical signoff.
Experience working with EDA tools and exposure to their APIs.
Use design knowledge and innovative physical construction and optimization flows to push performance, power, and Area (PPA) of GPU designs.
Knowledge of multi-voltage, power gated, and power retention concepts will be an advantage.
Practical knowledge with hierarchical design approach, top-down design, budgeting, timing, and physical convergence will be an asset.
Application Deadline
Apple accepts applications to this posting on an ongoing basis.
About the company
Apple
Large Enterprise
Apple Inc. is a global technology company known for its innovative products and services, including the iPhone, iPad, Mac computers, and Apple Watch. Founded in 1976, Apple has continuously pushed the boundaries of design and functionality, earning a reputation for high-quality consumer electronics and software solutions like iOS and macOS. With a strong commitment to user experience and privacy, Apple also leads in digital services, offering platforms such as the App Store, Apple Music, and iCloud. The company's focus on sustainability and corporate responsibility further enhances its standing as a leader in the technology sector.