Role at a glance
- Salary
- Not Disclosed
- Location
- Austin, Texas, United States
- Work arrangement
- On-site
- Employment
- Full-time
- Experience
- Experience with script writing in one or more of the following languages: TCL, Perl, Python Preferred Qualifications Implementation experience on high performance CPU designs Working knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs Good understanding of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, and other analysis flows, and physical design verification (LEC, DVS, etc.) Experience working on timing for 1 ghz+ designs, including how to handle multiple clock and power domains Experience with one of the following static timing tools: Primetime or Tempus Experience with cross talk, noise, OCV, uncertainty, and derate methodology
- Education
- Minimum BS required
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Role Summary
The CPU Design Timing Engineer is responsible for timing closure for a CPU project. The role develops timing flows and works with CPU micro-architects and implementation engineers on timing analysis and closure.
What You'll Do
- Work with the CAD team to develop the project timing flow, including scripting to improve analysis flows and engineer efficiency.
- Work with CPU micro-architects and implementation engineers to drive timing closure for the CPU.
- Work with implementation and RTL teams on timing changes, and perform timing analysis and closure.
Generated from the employer's posting. Verify important details before applying.
View full postingQualifications
Minimum BS and experience writing scripts in TCL, Perl, or Python.
Required
- Experience with script writing in one or more of the following languages: TCL, Perl, Python
Preferred
- Implementation experience on high performance CPU designs
- Working knowledge of CPU microarchitecture, including common critical loops for timing and low-power CPU microarchitecture and...
- Good understanding of physical design tools and methodology, including physically aware synthesis and place-and-route tools and flows,...
- Experience working on timing for 1 GHz+ designs, including handling multiple clock and power domains
- Experience with PrimeTime or Tempus static timing tools
- Experience with crosstalk, noise, OCV, uncertainty, and derate methodology
Original job description
Content provided by the employer
Original job description
Content provided by the employer
Summary
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!
In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with constructing and modify timing flows, timing analysis, and timing closure.
Description
As a CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include but are not limited to:
• Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency
• Working extensively with CPU micro-architects and implementation engineers to drive timing closure for the CPU
Minimum Qualifications
Minimum BS required
Experience with script writing in one or more of the following languages: TCL, Perl, Python
Preferred Qualifications
Implementation experience on high performance CPU designs
Working knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs
Good understanding of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, and other analysis flows, and physical design verification (LEC, DVS, etc.)
Experience working on timing for 1 ghz+ designs, including how to handle multiple clock and power domains
Experience with one of the following static timing tools: Primetime or Tempus
Experience with cross talk, noise, OCV, uncertainty, and derate methodology
Application Deadline
Apple accepts applications to this posting on an ongoing basis.
About the company
Apple
Large Enterprise
Apple Inc. is a global technology company known for its innovative products and services, including the iPhone, iPad, Mac computers, and Apple Watch. Founded in 1976, Apple has continuously pushed the boundaries of design and functionality, earning a reputation for high-quality consumer electronics and software solutions like iOS and macOS. With a strong commitment to user experience and privacy, Apple also leads in digital services, offering platforms such as the App Store, Apple Music, and iCloud. The company's focus on sustainability and corporate responsibility further enhances its standing as a leader in the technology sector.