Cisco

Cisco

Posted via Workday

Firmware Architect & Subsystem Technical Leader, Acacia

Apply by Nov 30, 2026

Posted Oct 22, 2026

Role at a glance

Job function
Software Engineering & IT Embedded Software Engineering
Salary
Not yet verified Check the description for pay details; an amount or pay period has not been verified.
Location
Maynard, Massachusetts, United States
Work arrangement
Hybrid
Employment
Full-time
Education
Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or related field

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Role Summary

AI-generated

The Firmware Architect & Subsystem Technical Leader guides embedded CPU firmware architecture for Acacia transceiver subsystems and future system-on-chip architectures. The role leads firmware design and implementation and coordinates technical work across hardware-related engineering groups.

What You'll Do

  • Lead architecture, design, and implementation of embedded firmware for multi-core microcontrollers.
  • Partner with ASIC, DSP, Optical, and Hardware Engineering architects on hardware/software interfaces and optical subsystems.
  • Architect control-plane firmware, BSPs, device drivers, and real-time state machines for bare-metal and RTOS platforms.
  • Establish firmware engineering standards, mentor engineers, and drive alignment from system modeling to register-level implementation.

Generated from the employer's posting. Verify important details before applying.

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Qualifications

Requires a bachelor’s degree in a listed engineering or computer science field, or a related field, and 12+ years of professional experience, including 10+ years in low-level embedded C and C++ and 8+ years developing real-time embedded firmware on bare-metal systems and RTOS. Experience with ARM processors or microcontrollers, BSPs, device drivers, and hardware peripheral interfaces including I2C, SPI, UART, and MDIO.

Required

  • Low-level embedded C and C++ programming for resource-constrained hardware environments.
  • Real-time embedded firmware development on bare-metal systems and RTOS, including VxWorks, FreeRTOS, ThreadX, or similar.
  • ARM processor or microcontroller firmware, including BSPs, device drivers, and hardware peripheral interfaces.

Preferred

  • Firmware architecture for optical transceivers, high-speed mixed-signal ICs, photonics, or telecommunications transmission hardware.
  • Development of control-plane software, state machines, and multi-processor or multithreaded communication protocols.
  • Leadership of firmware engineering projects and collaboration across ASIC design, DSP modeling, Hardware, and SQA teams.
  • Proficiency with Git, Jira, Perforce, and Python or Shell scripting.
  • Experience in semiconductor or hardware environments, or engagement with optical industry standards bodies such as OIF or IEEE.

Original job description

Content provided by the employer


Meet the Team


Acacia (part of Cisco) is the industry market leader and pioneer in high-speed coherent optical transceivers and pluggable optical interconnects. Acacia’s groundbreaking coherent optical solutions are deployed across all hyperscaler cloud providers and telecommunications networks, interconnecting data centers across metropolitan spans, thousands of kilometers of terrestrial fiber, and deep submarine links.

With the explosive growth of artificial intelligence and machine learning workloads driving unprecedented bandwidth requirements, Acacia products are expanding into data center fabrics and high-performance compute clusters. In addition to powering deep-space optical communication systems, Acacia leads the client-side optics market with breakthrough PAM4 DSP architectures, including 1.6T PAM4 DSP platforms.


Joining Acacia’s Software team means collaborating with world-class engineers to push boundaries of optical networking.


Your Impact


As an Embedded Software Engineering Technical Leader for this team, you will serve as a principal firmware architect guiding the embedded CPU software architecture that configures, manages, and optimizes Acacia’s transceiver subsystems and future System-on-Chip (SOC) architectures.

In this high-impact technical leadership role, you will:


  • Lead end-to-end architecture, design, and implementation of high-reliability, low-latency embedded firmware for multi-core microcontrollers (ARM Cortex-R and Cortex-M).
  • Partner directly with ASIC, DSP, Optical, and Hardware Engineering architects to co-design hardware/software interfaces, configure complex optical subsystems, and resolve critical hardware-software boundary challenges.
  • Architect robust multi-threaded control-plane firmware, Board Support Packages (BSPs), device drivers, and real-time state machines on bare-metal and RTOS platforms.
  • Establish best-in-class firmware engineering standards, mentor senior and intermediate engineers across the software organization, and drive multi-functional alignment from high-level system modeling down to low-level register and bit-level implementation.
  • Provide technical direction and intermediate leadership runway to help scale our growing engineering presence in the community.

Minimum Qualifications


Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or related field with 12+ years of professional experience to include:

  • 10+ years in low-level embedded C and C++ programming for resource-constrained hardware environments.
  • 8+ years architecting and developing real-time embedded firmware on bare-metal systems and real-time operating systems (RTOS such as VxWorks, FreeRTOS, ThreadX, or similar).
  • Experience crafting lfirmware for ARM processors/microcontrollers (such as ARM Cortex-M or Cortex-R cores), including BSPs, device drivers and hardware peripheral interfaces (I2C, SPI, UART, MDIO).
  • Ability to work 100% onsite in Maynard, MA during the initial one-year onboarding period (with hybrid flexibility available thereafter).

Preferred Qualifications


  • Firmware architecture for optical transceivers, high-speed mixed-signal ICs, photonics, or telecommunications transmission hardware.
  • Development of control-plane software, state machines, and multi-processor/multithreaded communication protocols.
  • Successful leadership of firmware engineering projects and collaborating across ASIC design, DSP modeling, Hardware, and SQA teams.
  • Proficiency with modern version control and CI/CD tools (Git, Jira, Perforce) and automation scripting (Python, Shell).
  • Experience in semiconductor/hardware environments or engagement with optical industry standards bodies (e.g., OIF, IEEE).

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $192,400.00 to $275,800.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks.  Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

  • 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

  • Additional paid time away may be requested to deal with critical or emergency issues for family members

  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;

  • 1% of incentive target for each 1% of attainment between 75% and 100%; and

  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$214,100.00 - $356,300.00

Non-Metro New York state & Washington state:

$192,400.00 - $317,200.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Cisco

About the company

Cisco

Large Enterprise

Cisco is a global leader in networking technology, dedicated to connecting people and devices through innovative solutions. Founded in 1984, the company specializes in the development of hardware and software that enables secure internet communications, including routers, switches, and cybersecurity solutions. With a strong emphasis on cutting-edge research and development, Cisco continually adapts to the evolving digital landscape, empowering businesses to accelerate their digital transformation and improve operational efficiency. Committed to fostering talent, Cisco provides various career opportunities in fields such as engineering, sales, and technology, making it an ideal destination for aspiring professionals.