Job Details:

Job Description: 

Since the announcement of the world's first on-chip silicon photonics laser more than a decade ago, Intel continues to lead the industry with cutting-edge technology, silicon photonics integration, and scalable AI systems. Our dedication to advanced development ensures that Intel Silicon Photonics continues to drive future bandwidth growth in data center networks and AI infrastructure, with higher density, better power efficiency, and faster speeds. In the future we will deploy co-packaged silicon photonics optical I/O chip lets to enable higher performance, larger-scale and more power efficient AI systems. We are looking for great talent to accelerate this journey so if you are interested in joining our organization we want to hear from you. In this position, the selected candidate will join the Corporate Technology Office Team, contributing to its mission of advancing datacenter connectivity and strengthening Intel's competitive edge in scalable AI system design. As an expert in application parallelization, parallel system simulation and HW/SW co-design, the individual will be responsible for exploring the design of electro-optical systems for research and development (R/D) purposes. Key Responsibilities: • Define architectures and designs that meet specifications and performance targets for next-generation Intel systems using optical interconnects and advanced electrical networks-on-chip. • Optimize network-on-chip performance. • Collaborate with cross-functional teams to lead overall project development. • Develop simulation methodologies for scalable electro-photonic systems. • Advise on the development of test plans for overall system characterization. • Thoroughly document all design work with review materials and detailed design descriptions. The ideal applicant should possess excellent oral and written communication skills.

Qualifications:

Minimum Qualifications:
• Ph.D. in Computer Science or Electrical and Computer Engineering.
• At least 2+ peer-reviewed publications and/or patents in the simulation, design, optimization and implementation of parallel algorithms and network system simulations.
• 6+ months experience with the gem5 simulation system.

Preferred Qualifications:
• Strong proficiency CPU and GPU parallelization.
• Extensive design experience using hardware in high-level programming languages (C/C++, python).
• Familiarity with switch fabric architectures and related routing algorithms.
• Proven experience of building end-to-end simulation frameworks bridging electronics, and photonics in an overall system design.

Benefits at Intel

Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

          

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $170,500.00-240,710.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.