SoC DFT Engineer

Summary

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. In this highly visible role, you will be at the center of a semiconductor design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Description

As a DFT engineer you will be involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of semiconductor design.
- Developing and implementing DFT architecture
- Implementing DFT infrastructure
- Working with the DV team to verify DFT implementations and implement ECOs
- Generating structural test vectors and analyzing and improving coverage
- Working with designers on STA, physical, power and logical issues
- Working with test engineers to bring up test vectors on silicon
- Running schedules and supporting multi-functional engineering efforts

Minimum Qualifications

Minimum of BS + 3 years relevant industry experience.

Preferred Qualifications

Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time.
Experience developing DFT specifications and driving DFT architecture and methods for designs.
Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
Knowledge of industry standards for DFT and design tools.
Proven Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.
Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues.
Experience with STA constraints development and analysis for DFT modes and SDF simulations.
Ability to conduct experiments during silicon debug, gathering and analyzing data; and use scripting to support efficient handling of ATE data.

Pay & Benefits — Cupertino, California, United States

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $144,600 and $263,800, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Application Deadline

Apple accepts applications to this posting on an ongoing basis.